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| LTC3714 Intel Compatible, Wide Operating Range, Step-Down Controller with Internal Op Amp DESCRIPTIO The LTC(R)3714 is a synchronous step-down switching regulator controller for CPU power. An output voltage between 0.6V and 1.75V is selected by a 5-bit code (Intel mobile VID specification). The controller uses a constant on-time, valley current control architecture to deliver very low duty cycles without requiring a sense resistor. Operating frequency is selected by an external resistor and is compensated for variations in VIN and VOUT. Discontinuous mode operation provides high efficiency operation at light loads. A forced continuous control pin reduces noise and RF interference and can assist secondary winding regulation by disabling discontinuous mode when the main output is lightly loaded. Internal op amp allows programmable offsets to the output voltage during power saving modes. Fault protection is provided by internal foldback current limiting, an output overvoltage comparator and optional short-circuit shutdown timer. Soft-start capability for supply sequencing is accomplished using an external timing capacitor. The regulator current limit level is user programmable. Wide supply range allows operation from 4V to 36V at the input. , LTC and LT are registered trademarks of Linear Technology Corporation. Pentium is a registered trademark of Intel Corporation. FEATURES s s s s s s s s s s s s s s s s s s True Current Mode with Ultrafast Transient Response Stable with Ceramic COUT tON(MIN) < 100ns for Operation from High Input Ranges Supports Active Voltage Positioning No Sense Resistor Required 5-Bit VID Programmable Output Voltage: 0.6V to 1.75V Dual N-Channel MOSFET Synchronous Drive Programmable Output Offsets Power Good Output Voltage Monitor Wide VIN Range: 4V to 36V 1% 0.6V Reference Adjustable Frequency Programmable Soft-Start Output Overvoltage Protection Optional Short-Circuit Shutdown Timer Forced Continuous Control Pin Logic Controlled Micropower Shutdown: IQ 30A Available in 0.209" Wide 28-Lead SSOP Package APPLICATIO S s s Power Supply for Mobile Pentium(R) Processors and Transmeta Processors Notebook and Portable Computers TYPICAL APPLICATIO LTC3714 INTVCC CSS 0.1F PGOOD ION VIN RUN/SS ITH CC RC SGND INTVCC VID4 VID3 5-BIT VID VID2 VID1 VID0 PGND VOSENSE *OPTIONAL BG SENSE TG SW BOOST CB, 0.22F DB CMDSH-3 RON Transient Response of 8A to 23A Output Load Step M1 IRF7811 L1 x2 0.68H 10F 35V x4 VIN 5V TO 24V + M2 IRF7811 x3 D1* UPS840 COUT 270F 2V x4 VOUT 0.6V TO 1.75V 23A + CVCC 4.7F 0.003* 3714 F01 Figure 1. High Efficiency Step-Down Converter U U U 1.395V VOUT (1.35V) 50mV/DIV 1.213V 23A ILOAD 10A/DIV 8A 20s/DIV 3714 TA03 3714f 1 LTC3714 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW BG PGND SENSE SW TG BOOST VID0 VID1 VID2 1 2 3 4 5 6 7 8 9 28 INTVCC 27 VIN 26 EXTVCC 25 VID4 24 VID3 23 VOSENSE 22 VFB 21 ION 20 FCB 19 SGND 18 OPOUT 17 OP + 16 OP - 15 OPVIN Input Supply Voltage (VIN), ION ..................36V to - 0.3V Boosted Topside Driver Supply Voltage (BOOST) ................................................... 42V to - 0.3V SW, SENSE Voltages ................................... 36V to - 5V EXTVCC, (BOOST - SW), RUN/SS, VID0-VID4, PGOOD, FCB Voltages ............................... 7V to - 0.3V VON, VRNG Voltages ................(INTVCC + 0.3V) to - 0.3V ITH, VFB, VOSENSE Voltages ....................... 2.7V to - 0.3V TG, BG, INTVCC, EXTVCC Peak Currents .................... 2A TG, BG, INTVCC, EXTVCC RMS Currents .............. 50mA OPVIN, OP +, OP - ....................................................... 0V to 18V Operating Ambient Temperature Range LTC3714EG (Note 2) .......................... - 40C to 85C Junction Temperature (Note 3) ............................ 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C ORDER PART NUMBER LTC3714EG RUN/SS 10 VON 11 PGOOD 12 VRNG 13 ITH 14 G PACKAGE 28-LEAD PLASTIC SSOP TJMAX = 125C, JA = 130C/ W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL IQ PARAMETER Input DC Supply Current Normal Shutdown Supply Current Feedback Reference Voltage Feedback Voltage Line Regulation Feedback Voltage Load Regulation Error Amplifier Transconductance Forced Continuous Threshold Forced Continuous Current On-Time Minimum On-Time Minimum Off-Time Maximum Current Sense Threshold Main Control Loop The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 15V unless otherwise noted. CONDITIONS MIN TYP MAX UNITS 900 15 ITH = 1.2V (Note 4) VIN = 4V to 30V (Note 4), ITH = 1.2V ITH = 0.5V to 1.9V (Note 4) ITH = 1.2V (Note 4) VFCB = 0.6V ION = 60A, VON = 1.5V ION = 180A, VON = 0V ION = 60A, VON = 1.5V VRNG = 1V, VFB = 0.56V VRNG = 0V, VFB = 0.56V VRNG = INTVCC, VFB = 0.56V VRNG = 1V, VFB = 0.64V VRNG = 0V, VFB = 0.64V VRNG = INTVCC, VFB = 0.64V 7.5 340 q q q q q q q q 2000 30 0.606 - 0.3 2 0.63 -2 300 100 400 153 107 214 VFB VFB(LINEREG) VFB(LOADREG) gm(EA) VFCB IFCB tON tON(MIN) tOFF(MIN) VSENSE(MAX) 0.594 0.600 0.002 - 0.05 1.4 0.57 200 1.7 0.6 -1 250 50 250 113 79 158 133 93 186 - 67 - 33 - 93 10 400 1.5 VSENSE(MIN) Minimum Current Sense Threshold VFB(OV) VFB(UV) VRUN/SS(ON) Output Overvoltage Fault Threshold Output Undervoltage Fault Threshold RUN Pin Start Threshold 12.5 460 2 0.8 2 U A A V %/V % ms V A ns ns ns mV mV mV mV mV mV % mV V 3714f W U U WW W LTC3714 ELECTRICAL CHARACTERISTICS SYMBOL VRUN/SS(LE) VRUN/SS(LT) IRUN/SS(C) IRUN/SS(D) VIN(UVLO) VIN(UVLOR) TG RUP TG RDOWN BG RUP BG RDOWN TG tr TG tf BG tr BG tf VINTVCC PARAMETER RUN Pin Latchoff Enable Threshold RUN Pin Latchoff Threshold Soft-Start Charge Current Soft-Start Discharge Current Undervoltage Lockout Threshold Undervoltage Lockout Threshold TG Driver Pull-Up On Resistance TG Driver Pull-Down On Resistance BG Driver Pull-Up On Resistance BG Driver Pull-Down On Resistance TG Rise Time TG Fall Time BG Rise Time BG Fall Time Internal VCC Voltage The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 15V unless otherwise noted. CONDITIONS RUN/SS Pin Rising RUN/SS Pin Falling - 0.5 0.8 VIN Falling VIN Rising TG High TG Low BG High BG Low CLOAD = 3300pF CLOAD = 3300pF CLOAD = 3300pF CLOAD = 3300pF 6V < VIN < 30V, VEXTVCC = 4V ICC = 0mA to 20mA, VEXTVCC = 4V ICC = 20mA, VEXTVCC Rising ICC = 20mA, VEXTVCC = 5V q q q q MIN TYP 4 3.5 -1.2 1.8 3.4 3.5 2 2 3 1 20 20 20 20 MAX 4.5 4.2 -3 3 3.9 4 3 3 4 2 UNITS V V A A V V ns ns ns ns Internal VCC Regulator 4.7 4.5 5 - 0.1 4.7 150 200 VFB Rising VFB Falling VFB Returning IPGOOD = 1mA 0.4 VVID0 to VVID4 = 0V VVID0 to VVID4 Open VVID0 to VVID4 = 5V, VRUN/SS = 0V 6 VOSENSE Programmed from 0.6V to 1.75V (Note 5) - 0.45 7.5 - 7.5 10 -10 1 0.15 1.2 - 2.5 4.5 0.01 10 0 1 14 0.25 12.5 -12.5 2.5 0.4 2 300 5.3 2 V % V mV mV % % % V V A V A K % VLDO(LOADREG) Internal VCC Load Regulation VEXTVCC EXTVCC Switchover Voltage VEXTVCC VEXTVCC(HYS) PGOOD Output VFBH VFBL VFB(HYS) VPGL VID DAC VVID(T) IVID(PULLUP) VVID(PULLUP) IVID(LEAK) RVID VOSENSE VID0-VID4 Logic Threshold Voltage VID0-VID4 Pull-Up Current VID0-VID4 Pull-Up Voltage VID0-VID4 Leakage Current Resistance from VOSENSE to VFB DAC Output Accuracy PGOOD Upper Threshold PGOOD Lower Threshold PGOOD Hysteresis PGOOD Low Voltage EXTVCC Switch Drop Voltage EXTVCC Switchover Hysteresis VIN = 5V unless otherwise noted. Internal Op Amp VOS IOS IB CMRR Input Offset Voltage Input Offset Current Input Bias Current Common Mode Rejection Ratio VCM = 0V to (VCC - 1V) VCM = 0V to 18V 400 4 45 100 80 1000 10 80 V nA nA dB dB 3714f 3 LTC3714 The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 5V unless otherwise noted. SYMBOL PSRR AVOL VOL VOH ISC IS PARAMETER Power Supply Rejection Ratio Large-Signal Voltage Gain Output Voltage Swing LOW Output Voltage Swing HIGH Short-Circuit Current Supply Current CONDITIONS OPVIN = 3V to 12.5V, OPOUT = VO = 1V OPVIN = 5V, OPOUT = 500mV to 4.5V, RL = 10k OPVIN = 5V, ISINK = 5mA OPVIN = 5V, ISOURCE = 5mA Short to GND Short to OPVIN q q ELECTRICAL CHARACTERISTICS MIN TYP 100 1500 165 MAX UNITS dB V/mV 500 mV V mA mA 4.5 4.87 30 40 170 300 A Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3714E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD as follows: LTC3714EG: TJ = TA + (PD * 130C/W) Note 4: The LTC3714 is tested in a feedback loop that adjusts VFB to achieve a specified error amplifier output voltage (ITH). Note 5: The LTC3714 VID DAC is tested in a feedback loop that adjusts VOSENSE to achieve a specified feedback voltage (VFB = 0.6V) for each DAC VID code. 3714f 4 LTC3714 TYPICAL PERFOR A CE CHARACTERISTICS Transient Response Transient Response (Discontinuous Mode) RUN/SS 2V/DIV VOUT 500mV/DIV IL 5A/DIV IL 5A/DIV IL 5A/DIV VOUT 50mV/DIV 20s/DIV LOAD STEP 0A TO 10A VIN = 15V VOUT = 1.5V FCB = 0V FIGURE 1 CIRCUIT Efficiency vs Load Current 95 100 90 EFFICIENCY (%) VIN = 8.5V VIN = 15V EFFICIENCY (%) FREQUENCY (kHz) 85 80 VIN = 24V 75 VOUT = 1.35V FREQUENCY = 300kHz FIGURE 1 CIRCUIT 60 70 0 3 6 9 12 15 18 LOAD CURRENT (A) Load Regulation 0 NO AVP FIGURE 1 CIRCUIT 2.5 -0.1 2.0 CURRENT SENSE THRESHOLD (mV) ITH VOLTAGE (V) VOUT (%) -0.2 -0.3 0.5 -0.4 0 2 6 4 LOAD CURRENT (A) UW 21 3714 G03 Start-Up VOUT 50mV/DIV 3714 G01 20s/DIV LOAD STEP 1A TO 10A VIN = 15V VOUT = 1.5V FCB = INTVCC FIGURE 1 CIRCUIT 3714 G02 50ms/DIV VIN = 15V VOUT = 1.25V RLOAD = 0.125 3714 G19 Efficiency vs Input Voltage 300 Frequency vs Input Voltage FCB = 0V FIGURE 1 CIRCUIT IOUT = 10A 280 90 IOUT = 10A 260 80 IOUT = 1A IOUT = 23A 240 IOUT = 0A 70 220 0 5 10 15 20 INPUT VOLTAGE (V) 25 30 3714 G04 200 5 10 15 INPUT VOLTAGE (V) 20 25 3714 G05 ITH Voltage vs Load Current 300 FIGURE 1 CIRCUIT Current Sense Threshold vs ITH Voltage VRNG = 2V 1.4V 1V 100 0.7V 0.5V 200 1.5 CONTINUOUS MODE 1.0 DISCONTINUOUS MODE 0 -100 8 10 3714 G06 0 -200 0 10 5 LOAD CURRENT (A) 15 3714 G07 0 0.5 1.0 1.5 2.0 ITH VOLTAGE (V) 2.5 3.0 3714 G08 3714f 5 LTC3714 TYPICAL PERFOR A CE CHARACTERISTICS On-Time vs ION Current 10k VVON = 0V 1000 ON-TIME (ns) 1k ON-TIME (ns) 600 ON-TIME (ns) 100 10 1 10 ION CURRENT (A) 100 3714 G20 Maximum Current Sense Threshold vs VRNG Voltage MAXIMUM CURRENT SENSE THRESHOLD (mV) MAXIMUM CURRENT SENSE THRESHOLD (mV) 300 250 200 150 100 50 0 150 125 100 75 50 25 0 VRNG = 1V MAXIMUM CURRENT SENSE THRESHOLD (mV) 0.5 0.75 1.0 1.25 1.5 VRNG VOLTAGE (V) Feedback Reference Voltage vs Temperature 0.62 FEEDBACK REFERENCE VOLTAGE (V) 0.61 0.60 gm (mS) 0.59 0.58 -50 -25 75 0 25 50 TEMPERATURE (C) 6 UW 1.75 3714 G10 On-Time vs VON Voltage IION = 30A 300 250 200 150 100 200 50 On-Time vs Temperature IION = 30A VVON = 0V 800 400 0 0 2 1 VON VOLTAGE (V) 3 3714 G21 0 -50 -25 50 25 75 0 TEMPERATURE (C) 100 125 3714 G22 Maximum Current Sense Threshold vs RUN/SS Voltage 150 Maximum Current Sense Threshold vs Temperature VRNG = 1V 140 130 120 110 2.0 1.5 2 2.5 3 RUN/SS VOLTAGE (V) 3.5 3714 G23 100 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3714 G11 Error Amplifier gm vs Temperature 2.0 1.8 1.6 1.4 1.2 100 125 1.0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3714 G12 3714 G13 3714f LTC3714 TYPICAL PERFOR A CE CHARACTERISTICS Input and Shutdown Currents vs Input Voltage 1200 1000 EXTVCC OPEN 60 50 0 EXTVCC SWITCH RESISTANCE () INPUT CURRENT (A) INTVCC (%) 800 SHUTDOWN 600 400 200 EXTVCC = 5V 0 0 5 20 15 25 10 INPUT VOLTAGE (V) 30 35 3714 G24 FCB Pin Current vs Temperature 0 -0.25 FCB PIN CURRENT (A) FCB PIN CURRENT (A) -0.50 -0.75 -1.00 -1.25 -1.50 -50 -25 50 25 75 0 TEMPERATURE (C) RUN/SS Latchoff Thresholds vs Temperature UNDERVOLTAGE LOCKOUT THRESHOLD (V) 5.0 RUN/SS THRESHOLD (V) 4.5 LATCHOFF ENABLE 4.0 3.5 LATCHOFF THRESHOLD 3.0 -50 -25 75 0 25 50 TEMPERATURE (C) UW INTVCC Load Regulation 10 EXTVCC Switch Resistance vs Temperature -0.1 8 SHUTDOWN CURRENT (A) 40 30 20 10 0 -0.2 6 -0.3 4 -0.4 2 -0.5 0 10 30 40 20 INTVCC LOAD CURRENT (mA) 50 3714 G25 0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3714 G14 RUN/SS Pin Current vs Temperature 3 2 PULL-DOWN CURRENT 1 0 PULL-UP CURRENT -1 100 125 -2 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 3714 G15 3714 G16 Undervoltage Lockout Threshold vs Temperature 4.0 3.5 3.0 2.5 100 125 2.0 -50 -25 75 0 25 50 TEMPERATURE (C) 100 125 3714 G17 3714 G18 3714f 7 LTC3714 PI FU CTIO S BG (Pin 1): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTVCC. PGND (Pin 2): Power Ground. Connect this pin closely to the bottom of the sense resistor or if no sense resistor is used, to the source of the bottom N-channel MOSFET, the (-) terminal of CVCC and the (-) terminal of CIN. SENSE (Pin 3): Current Sense Comparator Input. The (+) input to the current comparator is normally connected to the SW node unless using a sense resistor (see Applications Information). SW (Pin 4): Switch Node. The (-) terminal of the bootstrap capacitor CB connects here. This pin swings from a diode voltage drop below ground up to VIN. TG (Pin 5): Top Gate Drive. Drives the top N-channel MOSFET with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. BOOST (Pin 6): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor CB connects here. This pin swings from a diode voltage drop below INTVCC up to VIN + INTVCC. VID0-VID4 (Pins 7, 8, 9, 24, 25): VID Digital Inputs. The voltage identification (VID) code sets the internal feedback resistor divider ratio for different output voltages as shown in Table 1. If unconnected, the pins are pulled high by internal 2.5A current sources. RUN/SS (Pin 10): Run Control and Soft-Start Input. A capacitor to ground at this pin sets the ramp time to full output current (approximately 3s/F) and the time delay for overcurrent latchoff (see Applications Information). Forcing this pin below 0.8V shuts down the device. VON (Pin 11): On-Time Voltage Input. Voltage trip point for the on-time comparator. Tying this pin to the output voltage makes the on-time proportional to VOUT. The comparator input defaults to 0.7V when the pin is grounded, 2.4V when the pin is tied to INTVCC. PGOOD (Pin 12): Power Good Output. Open drain logic output that is pulled to ground when the output voltage is not within 10% of the regulation point. VRNG (Pin 13): Sense Voltage Range Input. The voltage at this pin is ten times the nominal sense voltage at maximum output current and can be set from 0.5V to 2V by a resistive divider from INTVCC. The sense voltage defaults to 70mV when this pin is tied to ground, 140mV when tied to INTVCC. ITH (Pin 14): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.8V corresponding to zero sense voltage (zero current). OPVIN (Pin 15): Internal Op Amp Supply. Connect to INTVCC or a separate supply greater than 5V. OP - (Pin 16): Negative Input of the Internal Op Amp. OP + (Pin 17): Positive Input of the Internal Op Amp. OPOUT (Pin 18): Output of the Internal Op Amp. SGND (Pin 19): Signal Ground. All small-signal components and compensation components should connect to this ground, which in turn connects to PGND at one point. FCB (Pin 20): Forced Continous Input. Tie this pin to ground to force continuous synchronous operation at low load, to INTVCC to enable discontinuous mode operation at low load or to a resistive divider from a secondary output when using a secondary winding. ION (Pin 21): On-Time Current Input. Tie a resistor from VIN to this pin to set the one-shot timer current and thereby set the switching frequency. VFB (Pin 22): Error Amplifier Feedback Input. This pin connects to both the error amplifier input and to the output of the internal resistive divider. It can be used to attach additional compensation components if desired. VOSENSE (Pin 23): Output Voltage Sense. The output voltage connects here to the input of the internal resistive feedback divider. EXTVCC (Pin 26): External VCC Input. When EXTVCC exceeds 4.7V, an internal switch connects this pin to INTVCC and shuts down the internal regulator so that controller and gate drive power is drawn from EXTVCC. Do not exceed 7V at this pin and ensure that EXTVCC < VIN. VIN (Pin 27): Main Input Supply. Decouple this pin to SGND with an RC filter (1, 0.1F). 3714f 8 U U U LTC3714 PI FU CTIO S INTVCC (Pin 28): Internal 5V Regulator Output. The driver and control circuits are powered from this voltage. Decouple this pin to power ground with a minimum of 4.7F tantalum or other low ESR capacitor. FU CTIO AL DIAGRA 11 VON 21 ION 0.7V 2.4V 1 OST V tON = VON (10pF) IION + ICMP 20k - 1.4V VRNG 13 PGND X (0.5 TO 2) 0.7V 3.3A VOSENSE 23 1 240k Q2 Q4 Q6 1V UV R2 10k 5x (ALL VID PINS) INTVCC 2.5A Q3 Q1 Q5 OV 7 VID0 2 PGOOD 12 + - x5.3 0.8V SS EA RUN SHDN 1.2A 0.6V 0.6V 14 ITH CC1 10 RUN/SS CSS 22 VFB R1 19 SGND 3714 FD RC OP + 17 OP - 16 + - W - + U U U U U RON VIN 20 FCB 4.7V 1A 26 EXTVCC 27 VIN + CIN + - 0.6V REF 0.6V 5V REG - F + BOOST 6 CB M1 R S Q FCNT ON TG 5 SW 4 IREV SWITCH LOGIC SENSE 3 INTVCC SHDN OV 28 BG 1 + - L1 VOUT CVCC M2 + COUT + - 0.54V + 8 VID1 - 0.66V VID DAC 9 VID2 24 VID3 6V 25 VID4 + - 0.4V 15 OPVIN + OP AMP 18 OPOUT - 19 SGND 3714f 9 LTC3714 OPERATIO Main Control Loop The LTC3714 is a constant on-time, current mode controller for DC/DC step-down converters. In normal operation, the top MOSFET is turned on for a fixed interval determined by a one-shot timer OST. When the top MOSFET is turned off, the bottom MOSFET is turned on until the current comparator ICMP trips, restarting the one-shot timer and initiating the next cycle. Inductor current is determined by sensing the voltage between the PGND and SENSE pins using either the bottom MOSFET on-resistance or a separate sense resistor. The voltage on the ITH pin sets the comparator threshold corresponding to inductor valley current. The error amplifier EA adjusts this voltage by comparing the feedback signal VFB from the output voltage with an internal 0.6V reference. The feedback voltage is derived from the output voltage by a resistive divider DAC that is set by the VID code pins VID0VID4. If the load current increases, it causes a drop in the feedback voltage relative to the reference. The ITH voltage then rises until the average inductor current again matches the load current. At low load currents, the inductor current can drop to zero and become negative. This is detected by current reversal comparator IREV which then shuts off M2, resulting in discontinuous operation. Both switches will remain off with the output capacitor supplying the load current until the ITH voltage rises above the zero current level (0.8V) to initiate another cycle. Continuous synchronous operation can be forced in the LTC3714 by bringing the FCB pin below 0.6V. The benefit of forced continuous operation is lower output voltage ripple, faster transient response to current load steps and a much quieter frequency spectrum so that it won't interfere with any neighboring noise sensitive components. 10 U The operating frequency is determined implicitly by the top MOSFET on-time and the duty cycle required to maintain regulation. The one-shot timer generates an ontime that is proportional to the ideal duty cycle, thus holding frequency approximately constant with changes in VIN and VOUT. The nominal frequency can be adjusted with an external resistor RON. Overvoltage and undervoltage comparators OV and UV pull the PGOOD output low if the output feedback voltage exits a 10% window around the regulation point. Furthermore, in an overvoltage condition, M1 is turned off and M2 is turned on and held on until the overvoltage condition clears. Foldback current limiting is provided if the output is shorted to ground. As VFB drops, the buffered current threshold voltage ITHB is pulled down by clamp Q3 to a 1V level set by Q2 and Q6. This reduces the inductor valley current level to one sixth of its maximum value as VFB approaches ground. Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both M1 and M2. Releasing the pin allows an internal 1.2A current source to charge up an external soft-start capacitor CSS. When this voltage reaches 1.5V, the controller turns on and begins switching, but with the ITH voltage clamped at approximately 0.6V below the RUN/SS voltage. As CSS continues to charge, the soft-start current limit is removed. 3714f LTC3714 OPERATIO Internal Op Amp The internal op amp allows the user to program accurate offsets to the output voltage during power saving modes. By connecting the OP + pin to the output, the OPOUT pin to the VOSENSE pin and an external resistor R1 between the OP -and OPOUT pins, the op amp is hooked up as a unitygain feedback amplifier. Resistors R2 and R3, together with series switches, can then be placed on the OP - pin to allow negative offsets to be switched onto the output voltage (see Figures 2a and 2b). The accuracy of the offset will depend on the matching of the external resistors R1 to R2 and R3.* For applications that require less accurate output offsets, or none at all, the user can use the internal op amp for true differential remote sensing of the output voltage by connecting OPOUT to VOSENSE and using OP + and OP - for differential sensing across the output capacitor as shown in Figure 2c. VOUT OP + 17 15 OPVIN + - OP - 16 SLEEP MODE OFFSET U INTVCC/EXTVCC Power Power for the top and bottom MOSFET drivers and most of the internal controller circuitry is derived from the INTVCC pin. The top MOSFET driver is powered from a floating bootstrap capacitor CB. This capacitor is recharged from INTVCC through an external Schottky diode DB when the top MOSFET is turned off. When the EXTVCC pin is grounded, an internal 5V low dropout regulator supplies the INTVCC power from VIN. If EXTVCC rises above 4.7V, the internal regulator is turned off, and an internal switch connects EXTVCC to INTVCC. This allows a high efficiency source connected to EXTVCC, such as an external 5V supply or a secondary output from the converter, to provide the INTVCC power. Voltages up to 7V can be applied to EXTVCC for additional gate drive. If the input voltage is low and INTVCC drops below 3.5V, undervoltage lockout circuitry prevents the power switches from turning on. *An alternate configuration, shown in Figure 2b, can be used to program offsets as well. Either configuration can be used, depending upon the logic of control signals. If offsets are not required, the op amp can be used to remotely sense the output voltage, proving true differential sense. VOUT R1 OP + 17 OPOUT 18 VOSENSE 23 VFB R1 22 VID DAC 15 OPVIN + 18 23 R2 BATTERY MODE OFFSET OP - 16 VID DAC VFB 22 - R2 R1 R2 BATTERY MODE OFFSET R3 3714 F02b R3 SLEEP MODE OFFSET 3714 F02b Figure 2a Figure 2b VOUT+ R R OP + 17 15 OPVIN + - OPOUT VOSENSE 18 23 OP - 16 VOUT- R R 3714 F02c Figure 2c 3714f 11 LTC3714 APPLICATIO S I FOR ATIO The basic LTC3714 application circuit is shown in Figure 1. External component selection is primarily determined by the maximum load current and begins with the selection of the sense resistance and power MOSFET switches. The LTC3714 can use either a sense resistor or the on-resistance of the synchronous power MOSFET for determining the inductor current. The desired amount of ripple current and operating frequency largely determines the inductor value. Finally, CIN is selected for its ability to handle the large RMS current into the converter and COUT is chosen with low enough ESR to meet the output voltage ripple and transient specification. Maximum Sense Voltage and VRNG Pin Inductor current is determined by measuring the voltage across a sense resistance that appears between the PGND and SENSE pins. The maximum sense voltage is set by the voltage applied to the VRNG pin and is equal to approximately (0.133)VRNG. The current mode control loop will not allow the inductor current valleys to exceed (0.133)VRNG/RSENSE. In practice, one should allow some margin for variations in the LTC3714 and external component values and a good guide for selecting the sense resistance is: RSENSE = VRNG 10 * IOUT(MAX) An external resistive divider from INTVCC can be used to set the voltage of the VRNG pin between 0.5V and 2V resulting in nominal sense voltages of 50mV to 200mV. Additionally, the VRNG pin can be tied to SGND or INTVCC in which case the nominal sense voltage defaults to 70mV or 140mV, respectively. The maximum allowed sense voltage is about 1.33 times this nominal value. Connecting the SENSE Pin The LTC3714 can be used with or without a sense resistor. When using a sense resistor, it is placed between the source of the bottom MOSFET M2 and ground. Connect the SENSE pin to the source of the bottom MOSFET so that the resistor appears between the SENSE and PGND pins. Using a sense resistor provides a well defined current limit, but adds cost and reduces efficiency. Alternatively, one can eliminate the sense resistor and use the bottom 12 U MOSFET as the current sense element by simply connecting the SENSE pin to the switch node SW at the drain of the bottom MOSFET. This improves efficiency, but one must carefully choose the MOSFET on-resistance as discussed below. Power MOSFET Selection The LTC3714 requires two external N-channel power MOSFETs, one for the top (main) switch and one for the bottom (synchronous) switch. Important parameters for the power MOSFETs are the breakdown voltage V(BR)DSS, threshold voltage V(GS)TH, on-resistance RDS(ON), reverse transfer capacitance CRSS and maximum current IDS(MAX). The gate drive voltage is set by the 5V INTVCC supply. Consequently, logic-level threshold MOSFETs must be used in LTC3714 applications. If the input voltage is expected to drop below 5V, then sub-logic level threshold MOSFETs should be considered. When the bottom MOSFET is used as the current sense element, particular attention must be paid to its onresistance. MOSFET on-resistance is typically specified with a maximum value RDS(ON)(MAX) at 25C. In this case, additional margin is required to accommodate the rise in MOSFET on-resistance with temperature: W UU RDS(ON)(MAX) = RSENSE T The T term is a normalization factor (unity at 25C) accounting for the significant variation in on-resistance with temperature, typically about 0.4%/C as shown in Figure 3. Junction-to-case temperature is about 30C in most applications. For a maximum ambient temperature of 70C, using a value 100C = 1.3 is reasonable. The power dissipated by the top and bottom MOSFETs strongly depends upon their respective duty cycles and the load current. When the LTC3714 is operating in continuous mode, the duty cycles for the MOSFETs are: DTOP = DBOT VOUT VIN V -V = IN OUT VIN 3714f LTC3714 APPLICATIO S I FOR ATIO 2.0 T NORMALIZED ON-RESISTANCE 1.5 1.0 0.5 0 - 50 50 100 0 JUNCTION TEMPERATURE (C) 150 3714 F02 Figure 3. RDS(ON) vs Temperature The resulting power dissipation in the MOSFETs at maximum output current are: PTOP = DTOP IOUT(MAX)2 T(TOP) RDS(ON)(MAX) + k VIN2 IOUT(MAX) CRSS f PBOT = DBOT IOUT(MAX)2 T(BOT) RDS(ON)(MAX) Both MOSFETs have I2R losses and the top MOSFET includes an additional term for transition losses, which are largest at high input voltages. The constant k = 1.7A-1 can be used to estimate the amount of transition loss. The bottom MOSFET losses are greatest when the bottom duty cycle is near 100%, during a short-circuit or at high input voltage. Operating Frequency The choice of operating frequency is a tradeoff between efficiency and component size. Low frequency operation improves efficiency by reducing MOSFET switching losses but requires larger inductance and/or capacitance in order to maintain low output ripple voltage. The operating frequency of LTC3714 applications is determined implicitly by the one-shot timer that controls the on-time tON of the top MOSFET switch. The on-time is set by the current into the ION pin and the voltage at the VON pin according to: tON = VVON (10pF) IION 3714f U Tying a resistor RON from VIN to the ION pin yields an ontime inversely proportional to VIN. For a step-down converter, this results in approximately constant frequency operation as the input supply varies: f= VOUT VVONRON(10pF ) To hold frequency constant during output voltage changes, tie the VON pin to VOUT. The VON pin has internal clamps that limit its input to the one-shot timer. If the pin is tied below 0.7V, the input to the one-shot is clamped at 0.7V. Similarly, if the pin is tied above 2.4V, the input is clamped at 2.4V. Because the voltage at the ION pin is about 0.7V, the current into this pin is not exactly inversely proportional to VIN, especially in applications with lower input voltages. To correct for this error, an additional resistor RON2 connected from the ION pin to the 5V INTVCC supply will further help to stabilize the frequency. RON2 = 5V RON 0.7 V Changes in the load current magnitude will also cause frequency shift. Parasitic resistance in the MOSFET switches and inductor reduce the effective voltage across the inductance, resulting in increased duty cycle as the load current increases. By lengthening the on-time slightly as current increases, constant frequency operation can be maintained. This is accomplished with a resistive divider from the ITH pin to the VON pin and VOUT. The values required will depend on the parasitic resistances in the specific application. A good starting point is to feed about 25% of the voltage change at the ITH pin to the VON pin as shown in Figure 4a. Place capacitance on the VON pin to filter out the ITH variations at the switching frequency. The resistor load on ITH reduces the DC gain of the error amp and degrades load regulation, which can be avoided by using the PNP emitter follower of Figure 4b. W UU 13 LTC3714 APPLICATIO S I FOR ATIO RVON1 30k VOUT RVON2 100k RC ITH CC 3714 F04a VON CVON 0.01F LTC3714 (4a) Figure 4. Correcting Frequency Shift with Load Current Changes Inductor Selection Given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: V V IL = OUT 1 - OUT VIN fL Lower ripple current reduces cores losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Highest efficiency operation is obtained at low frequency with small ripple current. However, achieving this requires a large inductor. There is a tradeoff between component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current that is about 40% of IOUT(MAX). The largest ripple current occurs at the highest VIN. To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: VOUT VOUT L= 1- fIL(MAX) VIN(MAX) Once the value for L is known, the type of inductor must be selected. A variety of inductors designed for high current, low voltage applications are available from manufacturers such as Sumida and Panasonic. 14 U RVON1 3k VOUT 10k INTVCC Q1 2N5087 RVON2 10k CVON 0.01F RC ITH CC 3714 F04b W UU VON LTC3714 (4b) Schottky Diode D1 Selection The Schottky diode D1 shown in Figure 1 conducts during the dead time between the conduction of the power MOSFET switches. It is intended to prevent the body diode of the bottom MOSFET from turning on and storing charge during the dead time, causing a modest (about 1%) efficiency loss. The diode can be rated for about one half to one fifth of the full load current since it is on for only a fraction of the duty cycle. In order for the diode to be effective, the inductance between it and the bottom MOSFET must be as small as possible, mandating that these components be placed adjacently. The diode can be omitted if the efficiency loss is tolerable. CIN and COUT Selection The input capacitance CIN is required to filter the square wave current at the drain of the top MOSFET. Use a low ESR capacitor sized to handle the maximum RMS current. IRMS IOUT(MAX) VOUT VIN VIN -1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT(MAX) / 2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. 3714f LTC3714 APPLICATIO S I FOR ATIO The selection of COUT is primarily determined by the ESR required to minimize voltage ripple and load step transients. The output ripple VOUT is approximately bounded by: 1 VOUT IL ESR + 8 fCOUT Since IL increases with input voltage, the output ripple is highest at maximum input voltage. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering and has the necessary RMS current rating. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, POSCAP aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications providing that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. When used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and controller. High performance throughhole capacitors may also be used, but an additional ceramic capacitor in parallel is recommended to reduce the effect of their lead inductance. Top MOSFET Driver Supply (CB, DB) An external bootstrap capacitor CB connected to the BOOST pin supplies the gate drive voltage for the topside MOSFET. This capacitor is charged through diode DB from INTVCC when the switch node is low. When the top MOSFET turns on, the switch node rises to VIN and the BOOST pin rises to approximately VIN + INTVCC. The boost capacitor needs OPTIONAL EXTVCC CONNECTION 5V < VSEC < 7V LTC3714 EXTVCC SW R4 FCB R3 SGND SENSE BG PGND Figure 5. Secondary Output Loop and EXTVCC Connection 3714f * U to store about 100 times the gate charge required by the top MOSFET. In most applications 0.1F to 0.47F is adequate. Discontinuous Mode Operation and FCB Pin The FCB pin determines whether the bottom MOSFET remains on when current reverses in the inductor. Tying this pin above its 0.6V threshold (typically to INTVCC) enables discontinuous operation where the bottom MOSFET turns off when inductor current reverses. The load current at which current reverses and discontinuous operation begins, depends on the amplitude of the inductor ripple current. The ripple current depends on the choice of inductor value and operating frequency as well as the input and output voltages. Tying the FCB pin below the 0.6V threshold forces continuous synchronous operation, allowing current to reverse at light loads. In addition to providing a logic input to force continuous operation, the FCB pin provides a means to maintain a flyback winding output when the primary is operating in discontinuous mode. The secondary output VSEC is normally set as shown in Figure 5 by the turns ratio N of the transformer. However, if the controller goes into discontinuous mode and halts switching due to a light primary load current, then VSEC will droop. An external resistor divider from VSEC to the FCB pin sets a minimum voltage VSEC(MIN) below which continuous operation is forced until VSEC has risen above its minimum. R4 VSEC(MIN) = 0.6V 1 + R3 + VIN TG VIN CIN 1N4148 W UU + T1 1:N *+ VSEC CSEC 1F VOUT COUT 3714 F05 15 LTC3714 APPLICATIO S I FOR ATIO Fault Conditions: Current Limit and Foldback The maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. In the LTC3714, the maximum sense voltage is controlled by the voltage on the VRNG pin. With valley current control, the maximum sense voltage and the sense resistance determine the maximum allowed inductor valley current. The corresponding output current limit is: ILIMIT = VSNS(MAX) 1 + IL *RDS(ON)T 2 The current limit value should be checked to ensure that ILIMIT(MIN) > IOUT(MAX). The minimum value of current limit generally occurs with the lowest VIN at the highest ambient temperature. Note that it is important to check for selfconsistency between the assumed junction temperature and the resulting value of ILIMIT which heats the MOSFET switches. Caution should be used when setting the current limit based upon the RDS(ON) of the MOSFETs. The maximum current limit is determined by the minimum MOSFET onresistance. Data sheets typically specify nominal and maximum values for RDS(ON), but not a minimum. A reasonable assumption is that the minimum RDS(ON) lies the same amount below the typical value as the maximum lies above it. Consult the MOSFET manufacturer for further guidelines. 16 U To further limit current in the event of a short circuit to ground, the LTC3714 includes foldback current limiting. If the output falls by more than 50%, then the maximum sense voltage is progressively lowered to about one sixth of its full value. Minimum Off-Time and Dropout Operation The minimum off-time tOFF(MIN) is the smallest amount of time that the LTC3714 is capable of turning on the bottom MOSFET, tripping the current comparator and turning the MOSFET back off. This time is generally about 250ns. The minimum off-time limit imposes a maximum duty cycle of tON/(tON + tOFF(MIN)). If the maximum duty cycle is reached, due to a dropping input voltage for example, then the output will drop out of regulation. The minimum input voltage to avoid dropout is: VIN(MIN) = VOUT tON + tOFF(MIN) tON Output Voltage Programming The output voltage is digitally set to levels between 0.6V and 1.75V using the voltage identification (VID) inputs VID0-VID4. An internal 5-bit DAC configured as a precision resistive voltage divider sets the output voltage in increments according to Table 1. The VID codes are compatible with Intel Mobile Pentium(R) III processor specifications. Each VID input is pulled up by an internal 2.5A current source from the INTVCC supply and includes a series diode to prevent damage from VID inputs that exceed the supply. *Use RSENSE value here if a sense resistor is connected between SENSE and PGND. 3714f W UU LTC3714 APPLICATIO S I FOR ATIO INTVCC Regulator An internal P-channel low dropout regulator produces the 5V supply that powers the drivers and internal circuitry within the LTC3714. The INTVCC pin can supply up to 50mA RMS and must be bypassed to ground with a minimum of 4.7F tantalum or other low ESR capacitor. Good bypassing is necessary to supply the high transient currents required by the MOSFET gate drivers. Applications using large MOSFETs with a high input voltage and high frequency of operation may cause the LTC3714 to exceed its maximum junction temperature rating or RMS current rating. Most of the supply current drives the MOSFET gates unless an external EXTVCC source is used. In continuous mode operation, this current is IGATECHG = f(Qg(TOP) + Qg(BOT)). The junction temperature can be estimated from the equations given in Note 2 of the Electrical Characteristics. For example, the LTC3714EG is limited to less than 14mA from a 30V supply: TJ = 70C + (14mA)(30V)(130C/W) = 125C For larger currents, consider using an external supply with the EXTVCC pin. U Table 1. VID Output Voltage Programming VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VID2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VID1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 VOUT (V) 1.75V 1.70V 1.65V 1.60V 1.55V 1.50V 1.45V 1.40V 1.35V 1.30V 1.25V 1.20V 1.15V 1.10V 1.05V 1.00V 0.975V 0.950V 0.925V 0.900V 0.875V 0.850V 0.825V 0.800V 0.775V 0.750V 0.725V 0.700V 0.675V 0.650V 0.625V 0.600V 3714f W UU 17 LTC3714 APPLICATIO S I FOR ATIO EXTVCC Connection The EXTVCC pin can be used to provide MOSFET gate drive and control power from the output or another external source during normal operation. Whenever the EXTVCC pin is above 4.7V the internal 5V regulator is shut off and an internal 50mA P-channel switch connects the EXTVCC pin to INTVCC. INTVCC power is supplied from EXTVCC until this pin drops below 4.5V. Do not apply more than 7V to the EXTVCC pin and ensure that EXTVCC VIN. The following list summarizes the possible connections for EXTVCC: 1. EXTVCC grounded. INTVCC is always powered from the internal 5V regulator. 2. EXTVCC connected to an external supply. A high efficiency supply compatible with the MOSFET gate drive requirements (typically 5V) can improve overall efficiency. BOOST Q1 FMMT619 GATE OF M1 Q2 FMMT720 SW BG 10 TG Figure 6. Optional External Gate Driver 18 U 3. EXTVCC connected to an output derived boost network. The low voltage output can be boosted using a charge pump or flyback winding to greater than 4.7V. The system will start-up using the internal linear regulator until the boosted output supply is available. External Gate Drive Buffers The LTC3714 drivers are adequate for driving up to about 60nC into MOSFET switches with RMS currents of 50mA. Applications with larger MOSFET switches or operating at frequencies requiring greater RMS currents will benefit from using external gate drive buffers such as the LTC1693. Alternately, the external buffer circuit shown in Figure 6 can be used. Note that the bipolar devices reduce the signal swing at the MOSFET gate, and benefit from increased EXTVCC voltage of about 6V. INTVCC Q3 FMMT619 GATE OF M2 Q4 FMMT720 PGND 3714 F06 W UU 10 3714f LTC3714 APPLICATIO S I FOR ATIO Soft-Start and Latchoff with the RUN/SS Pin The RUN/SS pin provides a means to shut down the LTC3714 as well as a timer for soft-start and overcurrent latchoff. Pulling the RUN/SS pin below 1.5V puts the LTC3714 into a low quiescent current shutdown (IQ 30A). Releasing the pin allows an internal 1.2A internal current source to charge up the external timing capacitor CSS. If RUN/SS has been pulled all the way to ground, there is a delay before starting of about: tDELAY = 1.5V CSS = 1.3s/F CSS 1.2A ( ) When the voltage on RUN/SS reaches 1.5V, the LTC3714 begins operating with a clamp on ITH of approximately 0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH is raised until its full 2.4V range is available. This takes an additional 1.3s/F, during which the load current is folded back until the output reaches 50% of its final value. The pin can be driven from logic as shown in Figure 7. Diode D1 reduces the start delay while allowing CSS to charge up slowly for the soft-start function. After the controller has been started and given adequate time to charge up the output capacitor, CSS is used as a short-circuit timer. After the RUN/SS pin charges above 4V, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. A 1.7A current then begins discharging CSS. If the fault condition persists until the RUN/SS pin drops to 3.5V, then the con- 3.3V OR 5V D1 (7a) Figure 7. RUN/SS Pin Interfacing with Latchoff Defeated U troller turns off both power MOSFETs, shutting down the converter permanently. The RUN/SS pin must be actively pulled down to ground in order to restart operation. The overcurrent protection timer requires that the softstart timing capacitor CSS be made large enough to guarantee that the output is in regulation by the time CSS has reached the 4V threshold. In general, this will depend upon the size of the output capacitance, output voltage and load current characteristic. A minimum soft-start capacitor can be estimated from: CSS > COUT VOUT RSENSE (10 - 4 [F/Vs]) Generally 0.1F is more than sufficient. Overcurrent latchoff operation is not always needed or desired. Load current is already limited during a shortcircuit by the current foldback circuitry and latchoff operation can prove annoying during troubleshooting. The feature can be overridden by adding a pull-up current of > 5A to the RUN/SS pin. The additional current prevents the discharge of CSS during a fault and also shortens the soft-start period. Using a resistor to VIN as shown in Figure 7a is simple, but slightly increases shutdown current. Connecting a resistor to INTVCC as shown in Figure 7b eliminates the additional shutdown current, but requires a diode to isolate CSS. Any pull-up network must be able to pull RUN/SS above the 4.5V maximum threshold that arms the latchoff circuit and overcome the 4A maximum discharge current. INTVCC RSS* RUN/SS RSS* D2* RUN/SS VIN CSS *OPTIONAL TO OVERRIDE OVERCURRENT LATCHOFF CSS 3714 F07 W UU (7b) 3714f 19 LTC3714 APPLICATIO S I FOR ATIO Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in LTC3714 circuits: 1. DC I2R losses. These arise from the resistances of the MOSFETs, inductor and PC board traces and cause the efficiency to drop at high output currents. In continuous mode the average output current flows through L, but is chopped between the top and bottom MOSFETs. If the two MOSFETs have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the resistances of L and the board traces to obtain the DC I2R loss. For example, if RDS(ON) = 0.01 and RL = 0.005, the loss will range from 15mW up to 1.5W as the output current varies from 1A to 10A for a 1.5V output. 2. Transition loss. This loss arises from the brief amount of time the top MOSFET spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at input voltages above 20V and can be estimated from: Transition Loss (1.7A-1) VIN2 IOUT CRSS f 3. INTVCC current. This is the sum of the MOSFET driver and control currents. This loss can be reduced by supplying INTVCC current through the EXTVCC pin from a high efficiency source, such as an output derived boost network or alternate supply if available. 4. CIN loss. The input capacitor has the difficult job of filtering the large RMS input current to the regulator. It must have a very low ESR to minimize the AC I2R loss and sufficient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. Other losses, including COUT ESR loss, Schottky diode D1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. 20 U When making any adjustments to improve efficiency, the final arbiter is the total input current for the regulator at your operating point. If you make a change and the input current decreases, then you improved the efficiency. If there is no change in input current, then there is no change in efficiency. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD (ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The ITH pin external components shown in Figure 8 will provide adequate compensation for most applications. For a detailed explanation of switching control loop theory see Linear Technology Application Note 76. Design Example As a design example, take a supply with the following specifications: V IN = 7V to 24V (15V nominal), VOUT = 1.15V 100mV, IOUT(MAX) = 15A, f = 300kHz. First, calculate the timing resistor with VON = VOUT: RON = W UU ( 1 300kHz 10pF )( ) = 330k and choose the inductor for about 40% ripple current at the maximum VIN: L= 1.15V 1.15V 1- = 0.6H (300kHz)(0.4)(15A) 24V Choosing a standard value of 0.68H results in a maximum ripple current of: IL = 1.15V 1.15V 1- = 5.4A (300kHz)(0.68H) 24V 3714f LTC3714 APPLICATIO S I FOR ATIO Next, choose the synchronous MOSFET switch. Because of the narrow duty cycle and large current, a single SO-8 MOSFET will have difficulty dissipating the power lost in the switch. Choosing two IRF7811s (RDS(ON) = 0.013, CRSS = 60pF) yields a nominal sense voltage of: VSNS(NOM) = (15A)(0.5)(1.3)(0.013) = 127mV Tying VRNG to INTVCC will set the current sense voltage range for a nominal value of 140mV with current limit occurring at 186mV. To check if the current limit is acceptable, assume a junction temperature of about 100C above a 50C ambient with 150C = 1.6: CSS 0.1F 9 10 11 RPG 100k 12 13 RC 20k 14 CC2 100pF 19 VID2 RUN/SS VON PGOOD VRNG ITH SGND ION VFB FCB VOSENSE VID3 OPVIN OP - VID1 VID0 BOOST TG SW SENSE LTC3714 PGND BG INTVCC VIN EXTVCC VID4 OPOUT OP + CC1 2.2nF CION 0.01F 21 22 CFB 100pF 20 23 RON 330k 24 15 16 1 28 27 26 25 18 17 CVCC 4.7F RF 1 CF 0.1F CIN: UNITED CHEMICON THCR70EIH226ZT COUT: PANASONIC EEFUE0D271 L1: SUMIDA CEP125-4712-T007 Figure 8. CPU Core Voltage Regulator 1.15V/15A at 300kHz without Active Voltage Positioning U ILIMIT 186mV 1 + (5.4A ) = 20A (0.5)(1.6)(0.013) 2 and double check the assumed TJ in the MOSFET: PBOT 24V - 1.15V 20A = (1.6)(0.013) = 1.98 W 2 24V 2 W UU TJ = 50C + (1.98W)(50C/W) = 149C 8 7 DB CMDSH-3 6 5 4 3 2 M2 IRF7811 x2 COUT 270F 2V x5 CB 0.33F M1 L1 IRF7811 0.68H CIN 22F 25V x3 VIN 7V TO 24V VOUT 1.15V 15A D1 UPS840 5V 3714 F08 3714f 21 LTC3714 APPLICATIO S I FOR ATIO Because the top MOSFET is on for such a short time, a single IRF7811 will be sufficient. Checking its power dissipation at current limit with 80C = 1.2: PTOP 1.15V = (20A)2 (1.2)(0.013) + 24V (1.7)(24V)2 (20A)(60pF )(300kHz) = 0.299W + 0.353 W = 0.652W TJ = 50C + (0.652W)(50C/W) = 82.6C The junction temperatures will be significantly less at nominal current, but this analysis shows that careful attention to heat sinking will be necessary in this circuit. CIN is chosen for an RMS current rating of about 6A at temperature. The output capacitors are chosen for a low ESR of 0.005 to minimize output voltage changes due to inductor ripple current and load steps. The ripple voltage will be only: VOUT(RIPPLE) = IL(MAX) (ESR) = (5.4A) (0.005) = 27mV However, a 0A to 15A load step will cause an output change of up to: VOUT(STEP) = ILOAD (ESR) = (15A) (0.005) = 75mV The complete circuit is shown in Figure 8. Active Voltage Positioning Active voltage positioning (also termed load "deregulation" or droop) describes a technique where the output voltage varies with load in a controlled manner. It is useful in applications where rapid load steps are the main cause of error in the output voltage. By positioning the output voltage at or above the regulation point at zero load, and below the regulation point at full load, one can use more of the error budget for the load step. This allows one to reduce the number of output capacitors by relaxing the ESR requirement. In the design example, Figure 8, five 0.025 capacitors are required in parallel to keep the output voltage within tolerance. Using active voltage positioning, the same specification can be met with only three capacitors. In this case, the load step will cause an output voltage change of: 22 U 1 VOUT (STEP) = (15A ) (0.025) = 125mV 3 By positioning the output voltage 60mV above the regulation point at no load, it will drop 65mV below the regulation point after the load step. However, when the load disappears or the output is stepped from 15A to 0A, the 65mV is recovered. This way, a total of 65mV change is observed on VOUT in all conditions, whereas a total of 75mV or 150mV is seen on VOUT without voltage positioning. Implementing active voltage positioning requires setting a precise gain between the sensed current and the output voltage. Because of the variability of MOSFET on-resistance, it is prudent to use a sense resistor with active voltage positioning. In order to minimize power lost in this resistor, a low value of 0.003 is chosen. The nominal sense voltage will now be: VSNS(NOM) = (0.003)(15A) = 45mV To maintain a reasonable current limit, the voltage on the VRNG pin is reduced to 0.5V by connecting it between INTVCC and GND, corresponding to a 50mV nominal sense voltage. Next, the gain of the LTC3714 error amplifier must be determined. The change in ITH voltage for a corresponding change in the output current is: 12V ITH = RSENSE IOUT VRNG = (24)(0.003)(15A ) = 1.08V The corresponding change in the output voltage is determined by the gain of the error amplifier and feedback divider. The LTC3714 error amplifier has a transconductance gm that is constant over both temperature and a wide 40mV input range. Thus, by connecting a load resistance RVP to the ITH pin, the error amplifier gain can be precisely set for accurate voltage positioning. 0.6V ITH = gm RVP VOUT VOUT 3714f W UU LTC3714 APPLICATIO S I FOR ATIO Solving for this resistance value: RVP = VOUT ITH (0.6V)gm VOUT (1.15V)(1.08V) = = 20.3k (0.6V)(1.7mS)(60mV) The gain setting resistance RVP is implemented with two resistors, RVP1 connected from ITH to ground and RVP2 connected from ITH to INTVCC. The parallel combination of these resistors must equal RVP and their ratio determines CSS 0.1F 9 10 11 VID2 RUN/SS VON PGOOD VRNG LTC3714 VID1 VID0 BOOST TG SW RRNG1 RRNG2 10k 90.1k RPG 100k 12 13 CC1 2.2nF RC 20k RVP2 185k RVP1 23k 14 CC1 100pF 19 21 ITH SGND ION VFB FCB VOSENSE VID3 OPVIN OP - SENSE PGND BG INTVCC VIN EXTVCC VID4 OPOUT OP + CION 0.01F 1 28 27 26 25 18 17 CVCC 4.7F RF 1 CF 0.1F CFB 100pF 22 20 23 RON 330k INTVCC 0.1F 24 15 16 CIN: UNITED CHEMICON THCR70EIH226ZT COUT: PANASONIC EEFUE0D271 L1: SUMIDA CEP125-4712-T007 Figure 9. CPU Core Voltage Regulator with Active Voltage Positioning 1.15V/15A at 300kHz 3714f U nominal value of the ITH pin voltage when the error amplifier input is zero. To set the beginning of the load line at the regulation point, the ITH pin voltage must be set to correspond to zero output current. The relation between voltage and the output current is: 12V 1 ITH(NOM) = RSENSE IOUT - IL + 0.75V VRNG 2 1 12V = (0.003) 0A - 5.4A + 0.75V 0.5V 2 = 0.55V 8 7 DB CMDSH-3 6 5 4 M2 IRF7811 x2 3 2 RSENSE 0.003 D1 UPS840 CB 0.33F M1 L1 IRF7811 0.68H CIN 10F 25V x3 VIN 7V TO 24V VOUT 1.15V/15A COUT 270F 2V x3 5V 3714 F08 W UU 23 LTC3714 APPLICATIO S I FOR ATIO RVP1 = Solving for the required values of the resistors: 5V 5V RVP = 20.3k 5V - ITH(NOM) 5V - 0.55V 5V ITH(NOM) 5V = 20.3k = 185k 0.55V = 23k RVP2 = RVP + VIN CIN M1 D1 M2 1 BG - - VOUT COUT DB + BOLD LINES INDICATE HIGH CURRENT PATHS Figure 10. LTC3714 Layout Diagram 24 U The modified circuit is shown in Figure 9. Refer to Linear Technology Design Solutions 10 for additional information about output voltage positioning. PC Board Layout Checklist When laying out the printed circuit board, use the following checklist to ensure proper operation of the controller. CVCC LTC3714 INTVCC VIN EXTVCC VID4 VID3 VOSENSE VFB ION FCB 28 CF 2 PGND 3 4 5 CB 6 7 8 9 CSS 10 11 12 13 CC1 RC 14 RUN/SS VON PGOOD VRNG ITH SGND 19 18 17 16 15 BOOST VID0 VID1 VID2 23 22 CION 21 20 CFB 27 26 25 24 RF SENSE SW TG RON OPOUT OP + OP - OPVIN CC2 3714 F10 W UU 3714f LTC3714 APPLICATIO S I FOR ATIO These items are also illustrated in Figures 10 and 11. * Segregate the signal and power grounds. All small signal components should return to the SGND pin at one point which is then tied to the PGND pin close to the source of M2. * Place M2 as close to the controller as possible, keeping the PGND, BG and SENSE traces short. * Connect the input capacitor(s) CIN close to the power MOSFETs. This capacitor carries the MOSFET AC current. VIN CIN CIN CIN CIN SW RSENSE PGND TO PGND (PIN 2) M1 M1 Figure 11. General Layout of External Power Components U * Keep the high dV/dT SW, BOOST and TG nodes away from sensitive small-signal nodes. * Connect the INTVCC decoupling capacitor CVCC closely to the INTVCC and PGND pins. * Connect the top driver boost capacitor CB closely to the BOOST and SW pins. * Connect the VIN pin decoupling capacitor CF closely to the VIN and PGND pins. * VID0-VID4 interface circuitry must return to SGND. M2 D1 SENSE TO SENSE (PIN 3) M2 M2 L1 PGND COUT COUT COUT COUT VOUT 3714 F11 W UU 3714f 25 LTC3714 TYPICAL APPLICATIO Performance Data for Intel Compatible Mobile Microprocessor Power Supply with Active Voltage Positioning Line Transient Reponse from VIN = 9V to 17V VIN 5V/DIV 50s/DIV EFFICIENCY (%) 26 U Load Transient Reponse for IOUT = 8A to 23A 1.395V VOUT (1.35V) 50mV/DIV VOUT 50mV/DIV AC COUPLED 1.213V 23A ILOAD 10A/DIV 8A 3714 TA02 20s/DIV 3714 TA03 Efficiency 95 VOUT = 1.35V 90 VIN = 8.5V VIN = 15V 85 80 VIN = 24V 75 70 0 3 6 9 12 15 18 LOAD CURRENT (A) 21 3714 TA04 3714f LTC3714 TYPICAL APPLICATIO 3.3V Transmeta CrusoeTM Microprocessor Power Supply with Active Voltage Positioning 200k VID2 INTVCC VRON 1M 1F 1k 2k POWER GOOD 220pF 10k 20k 100 VOUT 3.2k VIN 0.1F 10 0.01F 1k 11 12 13 BAT54 9 U1 VID2 RUN/SS VON PGOOD VRNG LTC3714EG VID1 VID0 BOOST TG SW SENSE 80.6k 1% 14 19 0.1F 1000pF 330k VIN 100pF 23 VID3 200k DPSLP BAT54C START R22 100k 15 3.3V 24 18 22 10k BAT54 20 21 FCB ION 0.1F VFB VOSENSE VID3 OPOUT OPVIN VIN VID4 EXTVCC OP + OP - 27 25 26 17 16 3.3V 5V 200k VID4 INTVCC 28 1 VIN 0.005 LTC3714EG ITH SGND PGND BG 8 7 6 5 0.22F 4 3 2 1 4.7F L1 1.8H 820pF 13k 1% CIN 10F 35V x2 200k 200k CMDSH-3 VIN 5V TO 24V VID1 VID0 3.3V PACKAGE DESCRIPTIO 5.20 - 5.38** (.205 - .212) 0 - 8 7.65 - 7.90 (.301 - .311) .05 - .21 (.002 - .008) .13 - .22 (.005 - .009) .55 - .95 (.022 - .037) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U U IRF7811 VOUT 0.6V To 1.75V 8A 1F 6.3V + COUT 270F 2V x2 IRF7811 MBRS340 0.01F 75k 1% VOUT 100k 1% START DPSLP 3714 TA01 453k 1% G Package 28-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 1.73 - 1.99 (.068 - .078) 10.07 - 10.33* (.397 - .407) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 .65 (.0256) BSC .25 - .38 (.010 - .015) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 G28 SSOP 0501 Crusoe is a trademark of Transmeta Corporation. 3714f 27 LTC3714 TYPICAL APPLICATIO Intel Compatible Mobile Microprocessor Power Supply with Active Voltage Positioning INTVCC 3.3V VRON 3.3V 2k POWER GOOD 100 1F 1k 10k 200k 1% INTVCC 220pF 3.3V INTVCC 0.1F RELATED PARTS PART NUMBER LTC1778 LTC3711 LTC3716 LTC3778 DESCRIPTION Low Duty Cycle, No RSENSETM Step-Down Controller 5-Bit Adjustable, Low Duty Cycle, No RSENSE, Step-Down Controller Dual Phase, High Efficiency Step-Down Controller Wide VIN, No RSENSE Step-Down Controller COMMENTS GN-16 Package, 0.8V Reference, Burst Mode Operation GN-24 Package, 5-Bit VID, 0.8VREF, Burst Mode Operation, 0.925V VOUT 2V 2-Phase, 5-Bit VID (0.6V to 1.75V), Narrow 36-Pin SSOP, 3.5V VIN 36V 4V VIN 36V, True Current Mode Control, 1A IOUT 20A 3714f No RSENSE is a trademark of Linear Technology Corporation. 28 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q U 200k 9 0.1F 10 11 3.2k 12 13 RUN/SS VON PGOOD VRNG VID0 BOOST TG SW SENSE 220pF 20k 14 19 10nF 21 20.5k 1% 100pF 22 20 23 200k 24 18 15 VFB FCB VOSENSE VID3 OPOUT OPVIN VIN VID4 EXTVCC 27 25 26 0.1F 200k 3.3V 5V 1 ION INTVCC 28 LTC3714 ITH SGND PGND BG 7 6 0.22F 5 4 3 2 1 CMDSH-3 IRF7811 x3 RSENSE 0.003 MBRS 340T3 IRF7811 x2 L1 0.68H VID2 VID1 8 200k 200k 7V VIN 24V CIN 10F 35V x4 VOUT 0.6V TO 1.75V 23A COUT 270F 2V x4 + + 4.7F 10V 1k 17 OP + OP - 16 806k 1% 10k 1% GMUXSEL 330k 10k 1% INTVCC 806k 1% 277k 1% 10k 100 DPSLP# DPRSLPVR 3714 TA01 LT/TP 0602 2K * PRINTED IN USA www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2001 |
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